Various example embodiments of the inventive concepts relate to a modem chip and, more particularly, to a modem chip for performing hybrid automatic repeat request (HARQ) processing, an application processor including the modem chip, and/or an operating method of the modem chip.
A HARQ process is a data transmission scheme capable of solving an upper layer time delay problem related to an automatic repeat request (ARQ) process execution, where the HARQ process performs additional channel coding to utilize an error packet, and is used in various mobile communication standards, e.g., high-speed packet access (HSPA), long term evolution (LTE), etc., standards. In a HARQ process, since previously received and saved HARQ data is combined with retransmitted data, memory (e.g., HARQ memory) for saving the previously received HARQ data is necessary.
Since the data transmission speed of mobile communication is increased, the size of the HARQ memory for saving the HARQ data also needs to be increased accordingly. When the HARQ memory included in a modem chip, or an application processor including the modem chip in the form of an on-die chip, due to the increase in the size of the HARQ memory, the sizes of the modem chip and the application processor may be increased and manufacturing costs may also be increased. In addition, since the number of accesses to the HARQ memory is increased, power consumption may also be increased.